1. Field of the Invention
The present invention relates to an IC embedded substrate in which an IC chip is incorporated therein, and a method of manufacturing the IC embedded substrate.
2. Description of Related Art
In recent years, portable electronic devices, such as smartphones and tablet PCs, have become increasingly popular. In each of portable electronic devices, in order to reduce the size of the device and improve the functionality, an IC embedded substrate in which many functions are put together are mounted. The IC embedded substrate is a module component in which a semiconductor IC of a bare chip state that has been ground so as to be very thin is embedded in the substrate, and passive components, such as capacitors, inductors, thermistors, and resistors, are surface-mounted on the surface of the substrate. This IC embedded substrate allows various power supply circuits and a plurality of wireless communication functions to be modularized. As a result, small, thin, and high-performance portable electronic devices can be realized.
A conventional IC embedded substrate disclosed in Japanese Patent No. 5,001,395 includes a core substrate, in which a cavity is formed; an IC chip, which is housed in the cavity; a first conductor pattern, which is formed on an upper surface of the core substrate; a second conductor pattern, which is formed around the first conductor pattern; and an insulating layer, which is formed on the upper surface of the core substrate in such a way as to cover the first and second conductor patterns and an opening of the cavity. The core substrate is a reinforcing member, such as glass cloth, that is impregnated with resin. In this manner, a desired level of substrate strength is ensured. The first conductor pattern is provided in such a way as to encircle the opening of the cavity, thereby keeping the insulating layer from being bent. In the first conductor pattern, a slit is formed. Part of the resin outside of the first conductor pattern goes through the slit to move to the inner side of the first conductor pattern. As a result, the insulating layer is equal in thickness on the inner and outer sides of the first conductor pattern. Therefore, the insulating layer can be flattened.
However, in the case of the above conventional embedded substrate, the following problems arise, as the core substrate is almost equal in thickness to the IC chip. That is, while the core substrate and the IC chip are covered with the insulating layer, the diameter of an IC connection via-hole conductor needs to be made larger in such a way as to pass through the insulating layer above the IC chip when the distance (height) from the upper surface of the IC chip to the upper surface of the insulating layer is long.
Therefore, the problem is that it is difficult to reduce the size of via-hole conductors and narrow their pitch. Another idea to reduce the size of via-hole conductors and narrow their pitch is to reduce the original thickness of the insulating layer. However, in this case, the problem is that the adhesive strength of the insulating layer and the flatness of the upper surface of the insulating layer could be worsened, and the reliability of a wiring layer formed on the upper surface of the insulating layer would decrease. The problem will become more obvious especially when the size of a filler contained in the insulating layer is larger than the thickness of the cured resin.
Moreover, in order to expand an effective area of the core substrate, the area of the cavity should be as small as possible. However, in such a case, the gap between a side surface of the IC chip and the inner peripheral surface of the cavity is very narrow, making it difficult to fill the gap with resin. If the gap is not sufficiently filled with resin, the fixed IC chip could become unstable, possibly leading to positional deviation of the IC chip and a connection failure.